A sample design

Block diagram

Project detail:

• Work: Schematic creation, component selection, Netlist creation,Fabrication and verification/testing
• Schematic tool: Cadence Orcad Capture CIS.
• Device type/package: SMD
• Size: 9.2" x 6.3"
• No. of pins: 13000+
• No. of layers: 10
• Frequency : 25 MHz

• DSP processor TS201S from analog devices, which can work up to 600 MHz, three Virtex FX-40 FPGAs from Xilinx.
• Two SDRAM external memory interfaced with DSP-TS201S.
• PROM for each FPGA for configuration.
• Two Flash Memories
• Two Gigabit Ethernet transceivers and six 10/100Mbps Ethernet transceivers interfaced with F2 & F3
• 4Mb(256X16 bit)SRAM
• High speed(125MSPS) dual ADCs and DAC s
• Low speed (500KSPS) quad ADCs and DAC s
• 10/100 Mbps Ethernet controller
• Codec with speaker and microphone interface
• Serial communication interface with UART and RS232
• Parallel port and latches for discrete inputs and outputs
• High speed USB controller interface
• Headers for daughter board connections

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